Permutes a vector of samples to into the desired order.
|Output Order||map||Assuming an input order of 0, 1, 2, …, this is a vector of the desired output order (e.g. [0 1 2 3]).|
|No. of inputs.||n_inputs||The number of parallel streams to which this reorder should be applied.|
|BRAM Latency||bram_latency||The latency of the BRAM buffer.|
|Map Latency||map_latency||The latency allowed for the combinatorial logic required for mapping a counter to the desired output order. If your permutation can be acheived by simply reordering bits (as is the case for bit reversed order, reverse order, and matrix tranposes with power-of-2 dimensions), a map latency of 0 is appropriate. Otherwise, 1 or 2 is a good idea.|
|Double Buffer||double_buffer||By default, this block uses single buffering (meaning it uses a buffer only the size of the vector, and permutes the data order in place). You can override this by setting this parameter to 1, in which case 2 buffers are used to permute the vector (saving logic resources at the expense of BRAM).|
|sync||in||Boolean||Indicates the next clock cycle contains valid data|
|en||in||Boolean||Indicates the current input data is valid.|
|din||in||Inherited||The data stream(s) to be permuted.|
|sync_out||out||Boolean||Indicates that data out will be valid next clock cycle.|
|valid||out||Boolean||Indicates the current output data is valid.|
|dout||out||Inherited||The permuted data stream(s).|
Permutes a vector of samples into the desired order. By default, this block uses a single buffer to do this. As vectors are permuted, the data placement in memory will go through several orders before it repeats. For large orders ( > 16) you should consider using double buffering, but otherwise, this block saves BRAM resources with only a modest increase in logic resources.